x86: include the PPIN in MCE records when available
authorJan Beulich <jbeulich@suse.com>
Wed, 18 Dec 2019 13:49:10 +0000 (14:49 +0100)
committerJan Beulich <jbeulich@suse.com>
Wed, 18 Dec 2019 13:49:10 +0000 (14:49 +0100)
commitdea5d6dd05837cdf2c83cd11e97e752fe04df694
tree8c243cb7916d0dc0417aec39ea8ac9d5490ee7c9
parent0e7c69bd3c0b35a677d73843b39522787ccf5a3f
x86: include the PPIN in MCE records when available

Quoting the respective Linux commit:

    Intel Xeons from Ivy Bridge onwards support a processor identification
    number set in the factory. To the user this is a handy unique number to
    identify a particular CPU. Intel can decode this to the fab/production
    run to track errors. On systems that have it, include it in the machine
    check record. I'm told that this would be helpful for users that run
    large data centers with multi-socket servers to keep track of which CPUs
    are seeing errors.

Newer AMD CPUs support this too, at different MSR numbers.

Take the opportunity and hide __MC_NMSRS from the public interface going
forward.

[Linux commit 3f5a7896a5096fd50030a04d4c3f28a7441e30a5]
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
tools/libxl/libxl_cpuid.c
tools/misc/xen-cpuid.c
xen/arch/x86/cpu/mcheck/mce.c
xen/arch/x86/cpu/mcheck/mce.h
xen/arch/x86/cpu/mcheck/mce_amd.c
xen/arch/x86/cpu/mcheck/mce_intel.c
xen/include/asm-x86/msr-index.h
xen/include/public/arch-x86/cpufeatureset.h
xen/include/public/arch-x86/xen-mca.h
xen/include/public/xen-compat.h